Design Principles

The primary principle of EMI shielding cover design is: maximize shielding effectiveness while ensuring manufacturability and cost efficiency. The design process must balance the following factors:

• Shielding Effectiveness versus aperture size
• Material thickness versus cost
• Grounding design complexity versus shielding reliability
• Height clearance versus device placement

Excellent shielding cover design must work closely with PCB design and cannot be viewed as a passive afterthought.

Dimensions and Wall Thickness Specifications

External Dimensions

The external dimensions of the shielding cover should be determined based on the shielded chip or circuit area:

For one-piece shielding covers, the ratio of depth to thickness (depth/thickness) should not exceed 8:1 to ensure forming accuracy.

PCB Footprint Design

Footprint Width and Spacing

• Footprint Width: 2.0-2.5mm (single-side soldering). Too narrow causes soldering reliability issues; too wide wastes PCB space.
• Footprint Thickness (Plating): Copper thickness ≥35µm, tin plating thickness ≥5µm to ensure soldering wettability.
• Footprint Spacing: For two-piece shielding cover frame footprints, spacing should not exceed 5-7mm. Excessive spacing results in shielding effectiveness loss.
• Footprint Continuity: Frame footprints should form continuous four-side contact, avoiding openings or breaks.

Grounding Design

Number of Grounding Points

The shielding cover must connect to the PCB ground layer through multiple grounding points to form a low-impedance path:

• Frequency <1GHz: Minimum 4 grounding points, one at each corner.
• Frequency 1-5GHz: Minimum 6-8 grounding points, one every 1.5-2cm around perimeter.
• Frequency >5GHz: Minimum 8-12 grounding points, one every 0.8-1cm around perimeter.
• High shielding requirements (SE>70dB): Grounding point spacing should not exceed λ/20 (where λ is the wavelength at the highest operating frequency).

Via Layout

A via array should be placed around each footprint, directly connecting to the internal ground plane:

• Place at least 2-4 vias (0.3-0.4mm diameter) around each footprint location.
• Via spacing 0.5-1mm, arranged in a barrier pattern.
• All vias should connect to the main ground plane, avoiding other signal traces.
• Total cross-sectional area of ground vias should be ≥50% of footprint area.

Aperture Rules

Maximum Aperture Size

Ventilation holes or signal apertures in the shielding cover must be strictly controlled to prevent high-frequency signal leakage. The general rule is:

Maximum Aperture Size = λ/10 (where λ is the wavelength at the highest operating frequency)

Frequency and Aperture Size Correspondence Table

Height Clearance and Component Placement

Internal Shielding Cover Height

• Highest Internal Component Height: Measure the maximum height of all components (chips, capacitors, resistors, etc.) in the shielded area.
• Recommended Clearance: Reserve ≥0.5-1mm between shielding cover inner top and highest component.
• Soldering Height: Height of shielding cover bottom footprint to PCB surface is approximately 0.3-0.5mm (soldering thickness), which must be considered in height calculations.
• Cooling Consideration: For high-power chips, recommend reserving ≥2mm clearance for cooling and airflow circulation.

Thermal Management Considerations

Shielding covers may impede cooling of internal components. Design recommendations for heat-generating chips:

• Cooling Holes: Design ventilation holes in the shielding cover interior; hole diameter must comply with λ/10 rule. Multiple small holes can be used instead of one large hole.
• Thermal Pads: Thermal pads can be adhered inside shielding covers to improve heat transfer efficiency.
• Material Selection: Tinplate thermal conductivity approximately 50 W/m·K, sufficient for most applications. For extreme cooling requirements, copper (thermal conductivity >400 W/m·K) can be considered.
• External Cooling: For shielded high-power areas, add heat sinks or increase airflow outside the cover, conducting heat through the cover walls.

Design for Manufacturability Checklist (DFM)

Common Design Defects and Improvement Solutions

Defect 1: Insufficient Shielding Effectiveness

Symptom: Measured shielding effectiveness far below calculated values (loss >10dB).

Causes:

• Insufficient grounding points, excessive spacing
• Poor footprint contact, excessive contact resistance
• Aperture size exceeds specifications
• Poor material conductivity (oxidation, contamination)

Solution: Increase grounding points, reduce spacing to 2-3mm; inspect soldering quality; reduce aperture size; use gold or nickel plating to improve conductivity.

Defect 2: Soldering Cracks or Delamination

Symptom: Shielding cover separates during rework or testing; footpads crack.

Causes:

• Footprints too small, insufficient soldering strength
• Improper soldering process parameters (temperature, time)
• Material thermal expansion coefficient mismatch (CTE mismatch)

Solution: Increase footprint width to 2.5mm; optimize soldering temperature curve; use materials more compatible with shielding cover (FR-4 CTE≈16ppm/K, closer to copper-nickel).

Summary and Design Recommendations

Shielding cover design is a systematic engineering process requiring comprehensive consideration from component selection, PCB layout, soldering process to test verification. Designers should reference this guide and provide complete DFM checklists when communicating with suppliers to ensure design intent is accurately realized.